This invention relates to the generation of an event marker and more particularly to the generation of such a marker from a notch in a rotating shaft.
In the design of protection and diagnostic electronics associated with a rotating machine such as a turbine generator, an xe2x80x9ceventxe2x80x9d marker is often used to identify particular system parameters. The xe2x80x9ceventxe2x80x9d marker is usually generated whenever a sensor detects a notch in the shaft of the turbine. Because of the notch shape, the result is a trapezoidal pulse waveform. When the turbine shaft is in motion, these pulses combine into an alternating square wave. Often, a DC voltage offsets the square wave. This voltage is not used in the calculation of the system parameters and as such should be removed.
There are several techniques that have been used in the prior art to remove the DC offset voltage. Three such prior art techniques are described below in conjunction with FIGS. 1-3.
The first such technique shown in circuit 10 of FIG. 1, utilizes a fixed reference voltage, Vref, and a potentiometer Rv. With the potentiometer Rv, the reference voltage Vref can be changed to a value that eliminates the DC bias from the raw signal Vin. This method provides the greatest performance to cost ratio (which may not be the greatest benefit to cost ratio). The waveforms below FIG. 1 which are also applicable to the other prior art circuits shown in FIGS. 2 and 3 and the circuit of the present invention shown in FIG. 4 show the input signal Vin, below the output voltage Vout of each circuit and also show the voltage with the DC bias removed at the input to the comparator 12 of FIG. 1.
The main disadvantage with circuit 10 is the use of the potentiometer Rv. Rather than automatically detecting the bias and subtracting it from the input signal to the comparator 12, the circuit 10 needs manual intervention to adjust the signal in the event that the DC bias should vary. While the DC bias is considered non-time varying, the offset is not immune to variations in the turbine shaft. Because of this, frequent adjustment to circuit 10 are required.
As is shown in FIG. 1 and also in the prior art circuits of FIGS. 2 and 3 and the circuit of the present invention shown in FIG. 4, the comparator 12 of circuit 10 has hysteresis associated therewith. As those of ordinary skill in the art will appreciate, hysteresis is not necessary to the circuits shown in FIGS. 1-4 but is used in such circuits to eliminate signals at the output of the comparator as a result of noise on the input signal to the comparator.
The second such technique is shown in circuit 20 of FIG. 2. This design uses a microcontroller (xcexcC) 22 in conjunction with an analog-to-digital converter (ADC) 24 and a digital-to-analog converter (DAC) 26 to detect the signal, calculate the average, and subtract the result from the input signal to the comparator 28. It should be appreciated that the summer shown in FIG. 2 at the input to comparator 28 is symbolic. As is well known the comparator has a positive input to which the attenuated input voltage KVin is connected and a negative input to which the average voltage calculated by microcontroller 22 and converters 24 and 26 is connected.
With circuit 20, automatic response to changes in bias is achieved. Taken as an independent circuit, circuit 20 is more costly than circuit 10 of FIG. 1. However, if a processor with a built in ADC and DAC is chosen, and the design is placed on a printed circuit board with other circuitry, then the cost of using a xcexcC 22 can be distributed throughout the design.
The main disadvantage associated with circuit 20 is its dependence on a xcexcC 22. When taken independently, circuit 20 is more costly than circuit 10. Taken in conjunction with other designs on a printed circuit board, circuit 20 has to deal with the demands of the other circuits on the xcexcC 22. Depending on the functions required of the xcexcC 22, this could create delays in response and reduce the bandwidth of the bias removal system.
The third such technique is circuit 30 shown in FIG. 3. Rather than subtract a voltage from the input signal Vin in order to remove the bias, the bias is simply blocked by a capacitor 32. Due to the nature of the component, capacitor 22 only allows the alternating square wave to pass. If capacitor 32 were. an ideal capacitor, all non-time varying signals would be blocked and only the alternating signals are allowed to pass. Circuit 30 is considered the least expensive of the three prior art techniques to manufacture.
The main disadvantage with circuit 30 is the use of the capacitor 32. Since the capacitor 32 is not ideal, there is, some inductance and resistance built into capacitor 32. The non-idealities of capacitor 32 reduces the performance of circuit 30. In addition to the resistance inherent to capacitor 32, an attenuating filter to alternating signals is created between the capacitor 32 and the resistors in circuit 30. This attenuating filter further reduces the performance of circuit 30. As such, the performance to cost ratio of circuit 30 is not considered to be as high as that of circuit 10 of FIG. 1.
The equation shown below FIG. 3 also applies to the prior art circuits shown in FIGS. 1 and 2 and the circuit of the present invention shown in FIG. 4. In that equation VI(t) is the time varying voltage of the impulse (see the Vin waveform of FIG. 1) and Vc is the DC level associated with Vin.
The circuit of the present invention does not use a potentiometer or a xcexcC or a capacitor and thus overcomes the deficiencies discussed above of the three prior art circuits 10, 20 and 30.
The present invention is a method for generating an event marker from the periodic input voltage, Vin, received from a notch in the shaft of a rotating machine.
The method has the steps of:
a) detecting and attenuating a positive peak in the periodic input voltage to produce a voltage Vinpk+/2;
b) detecting and attenuating a negative peak in the periodic input voltage to produce a voltage Vinpkxe2x88x92/2;
c) combining the produced voltages Vinpk+/2 and Vinpkxe2x88x92/2 to provide a bias cancelling voltage, Vbias as follows:
Vbias=((Vin)pk+)/2+((Vin)pkxe2x88x92)/2;
xe2x80x83and
d) subtracting the bias cancelling voltage from the periodic input voltage to provide an output voltage representative of the event marker.
The present invention is also the combination of a rotating machine having a shaft with a notch therein and a circuit for generating an event marker from the periodic input voltage, Vin, received from the notch. The circuit has a detector for detecting and attenuating a positive peak in the periodic input voltage to produce a voltage Vinpk+/2 and a detector for detecting and attenuating a negative peak in the periodic input voltage to produce a voltage Vinpkxe2x88x92/2. The circuit further has a summer for combining the voltages Vinpk+/2 and Vinpkxe2x88x92/2 to produce a bias cancelling voltage, Vbias, which is equal to ((Vin)pk+)/2+((Vin)pkxe2x88x92)/2. Additionally the circuit has a comparator having positive and negative inputs, the bias cancelling voltage received at the negative input and the periodic input voltage received at the positive input.
The present invention is also a circuit for generating an event marker from the periodic input voltage, Vin, received from a notch in the shaft. of a rotating machine. The circuit has a first means for producing from a detected and attenuated positive peak in the periodic input voltage a voltage Vinpk+/2, and from a detected and attenuated negative peak in the periodic input voltage a voltage Vinpkxe2x88x92/2 and providing therefrom a bias cancelling voltage, Vbias, which is equal to ((Vin)pk+)/2+((Vin)pkxe2x88x92)/2. The circuit also has a second means for subtracting the bias cancelling voltage from the periodic input voltage to provide an output voltage representative of the event marker.
The invention is further a circuit for generating an event marker from the periodic input voltage, Vin, received from a notch in the shaft of a rotating machine. The circuit has a detector for producing from a detected and attenuated positive peak in the periodic input voltage a voltage Vinpk+/2 and a detector for producing from a detected and attenuated negative peak in the periodic input voltage a voltage Vinpkxe2x88x92/2. The circuit also has a summer for combining the voltages Vinpk+/2 and Vinpkxe2x88x92/2 to produce a bias cancelling voltage, Vbias, which is equal to ((Vin)pk)/2+((Vin)pk)/2. The circuit further has a comparator having positive and negative inputs, the bias cancelling voltage received at the negative input and the periodic input voltage received at the positive input.